(Ebook PDF) 75th Anniversary of the Transistor 1st Edition by Arokia Nathan 1394202466 9781394202461 full chapters

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ISBN-10 :  1394202466 

ISBN-13 : 9781394202461

Author:  Arokia Nathan 

75th Anniversary of the Transistor is a commemorative anniversary volume to celebrate the invention of the transistor. The anniversary volume was conceived by the IEEE Electron Devices Society (EDS) to provide comprehensive yet compact coverage of the historical perspectives underlying the invention of the transistor and its subsequent evolution into a multitude of integration and manufacturing technologies and applications.

The book reflects the transistor’s development since inception to the current state of the art that continues to enable scaling to very large-scale integrated circuits of higher functionality and speed. The stages in this evolution covered are in chronological order to reflect historical developments.

 

75th Anniversary of the Transistor 1st Table of contents:

Chapter 1: The First Quantum Electron Device
Reference
Chapter 2: IEEE Electron Devices Society
2.1 Introduction
2.2 Origins of EDS
2.3 Growth of EDS
2.4 Publications
2.5 Conferences
2.6 Awards and Recognition
2.7 Conclusion
References
Chapter 3: Did Sir J.C. Bose Anticipate the Existence of p‐ and n‐Type Semiconductors in His Coherer/Detector Experiments?
3.1 Introduction
3.2 J.C. Bose: A Brief Biography
3.3 Bose’s Work on Detectors
3.4 Mott’s Remark
3.5 Understanding Semiconductors and Doping
3.6 Interpretation of Mott’s Remark
3.7 Conclusion
Acknowledgments
References
Chapter 4: The Point‐Contact Transistor
4.1 Introduction
4.2 Background and Motivation
4.3 Inventors’ Understanding How a Point‐Contact Transistor Operates
4.4 Recreating the Point‐Contact Transistor
4.5 Concluding Remarks
References
Chapter 5: On the Shockley Diode Equation and Analytic Models for Modern Bipolar Transistors
5.1 Introduction
5.2 Adaptation of Shockley Diode Equation to Modern Bipolar Transistors
5.3 Modern Bipolar Transistors Structures
5.4 Analytic Models for Modern Bipolar Transistors
5.5 Discussion
References
Chapter 6: Junction‐Less Field Effect Transistors
6.1 Introduction
6.2 Structure and Operation
6.3 Salient Features of JLFETs
6.4 Challenges for JLFETs
6.5 Unconventional Applications of JL Architecture
6.6 Conclusions
References
Chapter 7: The First MOSFET Design by J. Lilienfeld and its Long Journey to Implementation
7.1 Introduction
7.2 Demand for the Development of the Solid‐State Amplifier and Its Difficulty
7.3 Grid‐Inserted MESFETs
7.4 Lilienfeld Patents for the MESFET and MOSFET
7.5 Necessary Conditions for Successful MOSFET Operation, and MOSFET Development Chronology
7.6 Status of the Semiconductor Physics at the Lilienfeld Period (in the 1920s) and Thereafter
7.7 Improvement of Si and Ge Material Quality and Discovery of the pn Junction in the 1940s
7.8 H. Welker’s MISFET with Inversion Channel in 1945
7.9 Shockley’s Group Study for MOSFET from 1945 to 1947
7.10 Technology Development in the 1950s Until the First Successful MOSFET Operation in 1960
7.11 Success of MOSFET Operation by D. Kahng and M. Attala in 1960
7.12 After the First Successful Operation of the MOSFET
7.13 Summary and Conclusions
Acknowledgment
References
Chapter 8: The Invention of the Self‐Aligned Silicon Gate Process
References
Chapter 9: The Application of Ion Implantation to Device Fabrication
9.1 Introduction
9.2 Device Fabrication
9.3 Summary
Acknowledgments
References
Chapter 10: Evolution of the MOSFET
10.1 Introduction
10.2 The Early Days: Before 1980
10.3 From 1980 to 2000
10.4 The Latest: After 2000
10.5 Conclusion
References
Chapter 11: The SOI Transistor
11.1 The Beginnings
11.2 The Renaissance
11.3 The Smart‐Cut Dynasty
11.4 Special Mechanisms in FD‐SOI MOSFET
11.5 A Selection of Innovating Devices
11.6 The Future
References
Chapter 12: FinFET
12.1 The Show Stopper
12.2 The Cause of the Power Crises
12.3 The Real Cause of the Power Crises
12.4 A DARPA Request for Proposal
12.5 The Challenges and Team Work
12.6 Further Advancements by Industry
12.7 Conclusion
References
Chapter 13: Historical Perspective of the Development of the FinFET and Process Architecture
13.1 Introduction
13.2 Requirements for the End of CMOS Scaling
13.3 Restrictions of Planar Process Technology
13.4 Prompted Device/Process Technology Evolution by FinFET
13.5 Conclusion
References
Chapter 14: The Origin of the Tunnel FET
14.1 Background
14.2 Conception
14.3 Realization
14.4 Relevance
14.5 Prospects
References
Chapter 15: Floating‐Gate Memory
15.1 Introduction
15.2 The Charge‐Storage Concept
15.3 Early Device Structures
15.4 Multi‐Level Cells and 3D Structures
15.5 Applications
15.6 Scaling Challenges
15.7 Alternative Structures
15.8 Conclusion
Acknowledgments
References
Chapter 16: Development of ETOX NOR Flash Memory
16.1 Introduction
16.2 Background
16.3 Not the Perfect Solution
16.4 ETOX Development Challenges
16.5 Building a Business
16.6 Closing Words
Acknowledgments
References
Chapter 17: History of MOS Memory Evolution on DRAM and SRAM
17.1 Introduction
17.2 Revolutionary Technologies in DRAM History
17.3 Revolutionary Technologies in SRAM History
17.4 Summary
References
Chapter 18: Silicon‐Germanium Heterojunction Bipolar Transistors
18.1 Introduction (JDC)1
18.2 Some History from Early Days at IBM Research (SSI)
18.3 SiGe Epitaxy and Making the First SiGe Transistor (SSI)
18.4 MBE vs. UHV/CVD vs. APCVD for SiGe epi (SSI)
18.5 Putting Physics to Work – The Properties of SiGe HBTs (JDC)
18.6 SiGe BiCMOS: Devices to Circuits to Systems (JDC and SSI)
18.7 Using SiGe in Extreme Environments (JDC)
18.8 New Directions (JDC and SSI)
18.9 Some Parting Words (SSI)
References
Chapter 19: The 25‐Year Disruptive Path of InP/GaAsSb Double Heterojunction Bipolar Transistors
19.1 Introduction
19.2 Phase I: Simon Fraser Years (1995–2006)
19.3 Phase II: ETH Years (2006–2022)
19.4 Response to Innovation
19.5 Final Words
References
Chapter 20: The High Electron Mobility Transistor
20.1 Introduction
20.2 HEMT Electronics
20.3 Modulation‐Doped Structures in Physics
20.4 Exciting Prospects
20.5 Conclusions
Acknowledgments
References
Chapter 21: The Thin Film Transistor and Emergence of Large Area, Flexible Electronics and Beyond
21.1 Birth of Large Area Electronics
21.2 Polycrystalline Silicon and Oxide Thin Film Transistor
21.3 Trends in TFT Development
Acknowledgments
References
Chapter 22: Imaging Inventions
22.1 Setting the Stage for the Invention of the Charge‐Coupled Device (CCD)
22.2 The Invention of the CCD
22.3 Verifying the CCD Concept
22.4 The Invention of CCD Imagers
22.5 The First Solid‐State Color TV Camera
22.6 Mixed Analog Design Modem Chip
Acknowledgement
References
Chapter 23: The Invention and Development of CMOS Image Sensors
23.1 Introduction
23.2 Underlying Technology
23.3 Early Solid‐State Image Sensors
23.4 Invention of CMOS Image Sensors
23.5 Photon‐Counting CMOS Image Sensors
23.6 Conclusion
Acknowledgments
References
Chapter 24: From Transistors to Microsensors
24.1 Early Encounters
24.2 Integration
24.3 Silicon Sensors
24.4 Transistor Sensors
24.5 CMOS End Fabrication
24.6 Outlook
Acknowledgments
References
Chapter 25: Creation of the Insulated Gate Bipolar Transistor
25.1 Introduction
25.2 Historical Context
25.3 The Brock Effect
25.4 My IGBT Proposal
25.5 The Welch Edict
25.6 Manufacturing the First IGBT Product
25.7 First IGBT Product Release
25.8 IGBT Technology Enhancement
25.9 IGBT Evolution
25.10 IGBT Applications
25.11 IGBT Social Impact
25.12 My Sentiments
References
Chapter 26: The History of Noise in Metal‐Oxide‐Semiconductor Field‐Effect Transistors
26.1 Introduction
26.2 MOSFET Noise Time Line
26.3 Channel Thermal Noise
26.4 Induced Gate and Substrate Current Noise
26.5 Gate–Drain Current Noise Cross Correlation
26.6 Equilibrium Noise
26.7 Bulk Charge Effects
26.8 Gate Resistance Noise
26.9 Substrate Resistance Noise
26.10 Substrate and Gate Current Noise
26.11 Short‐Channel Effects
26.12 Effect on Channel Thermal Noise
26.13 1/f Noise
26.14 Conclusions
Acknowledgments
References
Chapter 27: A Miraculously Reliable Transistor
27.1 Introduction: A Transistor is Born
27.2 Transistor Reliability in the Proto‐Scaling Era
27.3 Reliability of Geometric‐ and Equivalent‐Scaling Eras
27.4 Conclusions: Reliability Challenges for the Hyper‐Scaling and Functional‐Scaling Eras
References
Chapter 28: Technology Computer‐Aided Design
28.1 Introduction
28.2 Short History
28.3 Scaling and Model Complexity
28.4 MINIMOS Commercialization and Beyond
28.5 Design Technology Co‐Optimization at Advanced Nodes
28.6 Electron Spin for Microelectronics
28.7 Summary and Outlook
References
Chapter 29: Early Integrated Circuits
References
Chapter 30: A Path to the One‐Chip Mixed‐Signal SoC for Digital Video Systems
30.1 Introduction
30.2 Bipolar ADCs at Early Development Stage of Digital TVs
30.3 A CMOS ADC for Digital Handy Camcorder
30.4 One‐Chip Mixed‐Signal SoC for DVD
References
Chapter 31: Historical Perspective of the Nonvolatile Memory and Emerging Computing Paradigms
31.1 Introduction
31.2 Rise of Solid‐State Nonvolatile Memory
31.3 NVM in Classical Computer Architectures
31.4 NVM‐Driven New Computing Paradigm
31.5 Conclusion
References
Chapter 32: CMOS Enabling Quantum Computing
32.1 Why Cryogenic Electronics?
32.2 The Quantum Stack
32.3 Modeling Cryo‐CMOS Devices
32.4 Specific Effects in Cryo‐CMOS Transistors
32.5 Perspectives and Trends
References
Chapter 33: Materials and Interfaces
33.1 Introduction
33.2 Back‐End‐of‐Line
33.3 Channel Materials
33.4 Gate Stack
33.5 Contacts
33.6 Summary
References
Chapter 34: The Magic of MOSFET Manufacturing
34.1 Introduction
34.2 The Magic of MOS
34.3 The Magic of Self‐alignment
34.4 The Magic of Semiconductor Manufacturing
34.5 Transistor Magic for the NEXT 75 Years?
References
Chapter 35: Materials Innovation
35.1 Introduction
35.2 MOSFET Basics
35.3 Complementary MOS (CMOS) Technology
35.4 MOSFET Scaling Challenges
35.5 MOSFET Materials Innovations
35.6 Outlook for Continued Transistor Scaling
References
Chapter 36: Germanium
36.1 Introduction
36.2 Need for High Mobility Material for MOS Channel
36.3 Surface Passivation of Ge‐Based MOSFETs
36.4 Low Resistance Contacts to Ge
36.5 Heteroepitaxial Growth of Ge on Si
36.6 Strained Ge and Heterostructure FETs
36.7 Nanoscale Ge FETs
36.8 Ge NMOSFETs
36.9 Ge‐Based Novel Devices for Optical Interconnects
36.10 Summary

 

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